1. Field of Invention
This invention relates to PCI communications, and more specifically, to transferring PCI bus transactions over a network.
2. Description of the Related Art
A peripheral component interconnect (PCI) bus is an expansion bus that provides a communication path between a central processing unit (CPU) and a PCI device such as a display, disk drive, or SCSI adapter. Depending on the desired system, more than one PCI bus may be necessary. For instance, attaching too many peripheral devices to one PCI bus may overload that bus and cause it to function improperly. Furthermore, two or more of the devices residing on that PCI bus may interfere with each other's respective performance. To help alleviate these problems, conventional systems incorporate a PCI-to-PCI bridge.
The PCI-to-PCI bridge connects two PCI buses thereby providing an interface for additional PCI devices. The bridge effectively places only one electrical load on the host PCI bus, and creates a new PCI bus that can support a number of additional devices as well as other PCI-to-PCI bridges thereby creating a hierarchy of buses as shown in FIG. 1. One benefit of such a system is that heavy PCI device population on one PCI bus can be redistributed to other PCI buses. Additionally, incompatible PCI devices can be isolated from one another by locating them on different PCI buses within the system. Thus, PCI bus technology has greatly expanded the ability of personal computers, workstations and servers to accommodate multiple and diverse peripheral devices without sacrificing performance due to an overloaded bus condition.
However, PCI technology is not without its problems. With the significant advances in processor clock speeds, the standard PCI operating frequency of 33 MHz seriously limits system bandwidth and is often the cause of a performance bottlenecks. Although higher operating frequencies are available (e.g., 66 MHz), they come at the cost of significantly reduced load limits for the corresponding PCI bus. Moreover, modern office computer systems and workstations interface with various I/O devices such as servers and storage units over substantial distances. PCI technology does not perform well over long distances without significantly reducing the operating frequency (below 1 MHz). This is because PCI technology is generally implemented on a printed circuit board (or series of printed circuit boards) where bus lengths are kept very short to limit the affect of parasitics. Thus, conventional PCI bus technology is inadequate to support modern processor clock speeds and geographically distributed peripheral devices.
What is needed, therefore, is a means for transferring PCI bus transactions (e.g., read and write) from a local node of a PCI bus to a PCI bus on a remote node over a network.